Mult-UIP: lpc_config.h Source File

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00001 #ifndef _LPC_CONFIG_H
00002 #define _LPC_CONFIG_H
00003 
00004 #include "lpc24xx.h"
00005 
00006 
00007 #define XTAL_CLOCK                      12000000
00008 #define CPU_CLOCK_HZ        ( ( unsigned int ) XTAL_CLOCK * 2 * (PLL_MUL+1) / (CPU_CLK_DIV+1) / (PLL_DIV+1) )   /* =11.0592Mhz xtal multiplied by 4 using the PLL. */
00009 
00010 /* PLL parameters */
00011 #define PLL_MUL                                 ( ( unsigned int ) ( 6 - 1 ) )
00012 #define PLL_DIV                                 ( ( unsigned int ) 0x0000 )
00013 #define CPU_CLK_DIV                             ( ( unsigned int ) 0x0001 )
00014 #define PLL_ENABLE                              ( ( unsigned int ) 0x0001 )
00015 #define PLL_CONNECT                             ( ( ( unsigned int ) 0x0002 ) | PLL_ENABLE )
00016 #define PLL_FEED_BYTE1                  ( ( unsigned int ) 0xaa )
00017 #define PLL_FEED_BYTE2                  ( ( unsigned int ) 0x55 )
00018 #define PLL_LOCK                                ( ( unsigned int ) 0x4000000 )
00019 #define PLL_CONNECTED                   ( ( unsigned int ) 0x2000000 )
00020 #define OSC_ENABLE                              ( ( unsigned int ) 0x20 )
00021 #define OSC_STAT                                ( ( unsigned int ) 0x40 )
00022 #define OSC_SELECT                              ( ( unsigned int ) 0x01 )
00023 
00024 /* Constants to setup the MAM. */
00025 #define mainMAM_TIM_3                           ( ( unsigned char ) 0x03 )
00026 #define mainMAM_MODE_FULL                       ( ( unsigned char ) 0x02 )
00027 
00028 #define FALSE (1==2)
00029 #define TRUE  !FALSE
00030 #define PASS 1
00031 #define FAIL 0
00032 
00033 /************************************************************
00034 Arquivo de cabecalho para habilitar interrupcoes no CPSR
00035 (Current Processor Status Register)
00036 ************************************************************/
00037 
00038 /* Declaracoes especiais para rotinas de atendimento a interrupcoes*/
00039 void SWI_Routine(void) __attribute__ ((interrupt("SWI")));
00040 void IRQ_Routine(void) __attribute__ ((interrupt("IRQ")));
00041 void FIQ_Routine(void) __attribute__ ((interrupt("FIQ")));
00042 
00043 /* Macros para habilitar/desabilitar IRQ/FIQ no CPSR */
00044 #define enableFIQ() asm volatile(\
00045         "mrs r3, cpsr\n" \
00046         "bic r3, r3, # 0x40\n" \
00047         "msr cpsr, r3\n")
00048 
00049 #define disableFIQ() asm volatile(\
00050         "mrs r3, cpsr\n" \
00051         "orr r3, r3, # 0x40\n" \
00052         "msr cpsr, r3\n")
00053 
00054 #define enableIRQ() asm volatile(\
00055         "mrs r3, cpsr\n" \
00056         "bic r3, r3, # 0x80\n" \
00057         "msr cpsr, r3\n")
00058 
00059 #define disableIRQ() asm volatile(\
00060         "mrs r3, cpsr\n" \
00061         "orr r3, r3, # 0x80\n" \
00062         "msr cpsr, r3\n")
00063 
00064 #endif